Design of a CMOS Low Noise Amplifier (LNA) at 5.8 GHz and Its Sensitivity Analysis
نویسندگان
چکیده
This paper presents a 5.8 GHz low voltage and low power LNA design integrated in a TSMC 0.18 μm CMOS process, and its sensitivity analysis. This sensitivity analysis gives a measure of the sensitivity of the LNA performance to a change in the circuit element values, thereby assisting the designer choose the adequate circuit-element tolerances. Such sensitivity analysis of the LNA is very beneficial for making appropriate design trade offs. The designed LNA requires only a 1 V supply voltage and consumes 4.5 mW DC power. At 5.8 GHz, this LNA has noise figure (NF) of 2.463 dB, with input return loss of -15.35 dB, output return loss of -16.26 dB, and voltage gain of 11.57 dB.
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